Freedom CAD Presenting at Cadence’s CDN Live Silicon Valley 2017

By Brian White | March 23, 2017

Freedom CAD Service’s Bryan LaPointe CID, will be presenting on “Designing High-Speed Signals with Cadence Allegro Design Suite” at CDNLive Silicon Valley 2016. This year’s event will be held on April 11 – 12 at the Santa Clara Convention Center – Santa Clara, CA

Session Description: High-speed signaling comes with certain challenges. By today’s standards it is not uncommon for a board to contain 1, 10 or even 25Gbit data rates. It is essential that the designer have a proper understanding of things such as impedances, stubs, return paths, and crosstalk in order to understand their effects and how to mitigate or control them. Utilizing commands and tools in the Cadence Allegro Design Suites versions 16.6 and 17.2 we will cover improved and automated processes to add backdrilling, return vias, antipad structures, and tabbed routing. Discussion of high-speed signaling theories will be accompanied by demonstrations of the tools.

Bryan LaPointe, CID Bio: Bryan LaPointe, CID for Freedom CAD Services Inc. specializes in High Speed Signal design in the Cadence Allegro PCB tool suites. Much of his time is spent designing 10-25 Gbit signals utilizing various interfaces, protocols, and technologies. His recent projects have extended into 56G Pam4 technologies.

CDNLive Silicon Valley brings together Cadence® technology users, developers, and industry experts for two days of networking, sharing best practices on critical design and verification issues, and discovering new techniques for designing advanced silicon, SoCs, and systems.

If you are interested in attending this year event and haven’t registered, you can do so by clicking on the Register Now link!


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