Freedom CAD’s Robert Jardon Discusses Allegro Flow Planner with Pete Waddell

By Brian White | March 21, 2011

Senior Designer Robert Jardon was interviewed recently by Printed Circuit Design and Fab’s Publisher, Pete Waddell.  Robert discussed how Freedom CAD approaches printed circuit board design planning and his use of Cadence’s Allegro Interconnect Flow Planner to drive more efficient and cost effective designs.

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